ZB25VQ64CSJG ZB25VQ64CTJG ZB25VQ64CWJG ZBIT/恒烁代理

GENERAL DESCRIPTION 

   The ZB25VQ64C_DTR of non-volatile flash memory devicesupports the standard Serial Peripheral  Interface(SPI). Traditional SPI single bit serial input and output (SingleI/O or SIO) is supported as well as  optional twobit (Dual I/O or DIO) and four bit (quad I/O or QIO) serialprotocols. This multiple width interface is called SPIMulti-I/O or MIO. 

   The SPI protocols use only 4 to 6 signals:◆Chip Select(CS#) ◆Serial Clock(CLK) ◆SerialData - IO0(DI) - IO1(DO) - IO2(WP#) - IO3 (HOLD#/ RESET#) 

   The ZB25VQ64C_DTR support the standard Serial PeripheralInterface (SPI), Dual/Quad I/O SPI as well as2-clocks instruction cycle Quad Peripheral Interface (QPI) as wellas Double Transfer Rate (DTR): Serial  Clock, ChipSelect, Serial Data I/O0 (DI), I/O1 (DO), I/O2 (WP#), and I/O3(HOLD# / RESET#). SPI clock  frequenciesof up to 133MHz are supported allowing equivalent clock rates of266MHz (133MHz x 2) for Dual  I/O and532MHz (133MHz x 4) for Quad I/O when using the Fast Read Dual/QuadI/O and QPI instructions.  Thesetransfer rates can outperform standard Asynchronous 8 and 16-bitParallel Flash memories. The  ContinuousRead Mode allows for efficient memory access with as few as8-clocks of instruction-overhead to  read a24-bit address, allowing true XIP (execute in place)operation. 

   A Hold pin, Write Protect pin and programmable writeprotection, with top or bottom array control, provide furthercontrol flexibility. Additionally, the device supports JEDECstandard manufacturer and device ID and  SFDPRegister, a 128-bit Unique Serial Number and three 1024-ByteSecurity Registers. 

   The ZB25VQ64C_DTR provides an ideal storage solution forsystems with limited space, signal  connections,and power. These memories' flexibility and performance is betterthan ordinary serial flash  devices.They are ideal for code shadowing to RAM, executing code directly(XIP), and storing  reprogrammabledata